The Mobile Industry Processor Interface Alliance (MIPI) developed a serial communication protocol known as the Display Serial Interface or DSI.MIPI DSI2 stands for high-speed Display Serial Interface between a host processor and a display module. The DSI2 interface enables manufacturers to integrate displays to achieve high performance, low power, and low electromagnetic interference (EMI) while reducing pin count and maintaining compatibility across different vendors.
A sublink in DSI-2 refers to an independent data stream within a lane, allowing multiple streams of image or video data to be transmitted simultaneously. This enables functionalities like:
DSI Transmitter that connects to two, three, or four DSI Receivers by splitting the DSI Link for either D Option or C Option. The multi-receiver configuration connects one DSI Transmitter to one display panel, with multiple DSI Receivers routing display data to separate portions of the panel. If a DSI Link can be split, the Sub-Links shall carry symmetrical, evenly divided Payloads. That is, each Sub-Link carries equal data to the whole panel.If the DSI Transmitter and DSI Receiver in a Sub-Link include LP Mode Lane reversal, Lane 0 of that Sub-Link shall support Lane reversal